Renesas H8/38024 Hardware Manual page 482

Notes: 1. Selected with SA1 and SA0 of system control register 2 (SYSCR2).
2. The figure in parentheses applies when an external clock is used.
3. After powering on, hold V
elapsed.
Table 16.4 Serial Interface (SCI3) Timing
V = 1.8 V to 5.5 V, AV
CC
specifications), T = –40°C to +85°C (wide-range specifications), T
a
subactive mode) unless otherwise indicated.
Item
Input clock Asynchronous
cycle
Synchronous
Input clock pulse width
Transmit data delay time
(synchronous)
Receive data setup time
(synchronous)
Receive data hold time
(synchronous)
Rev. 6.00, 08/04, page 452 of 628
at 2.2 V to 5.5 V until the chip's oscillation settling time has
CC
= 1.8 V to 5.5 V, V
CC
Values
Symbol Min Typ
t 4 —
scyc
6 —
t 0.4 —
SCKW
t — —
TXD
— —
t 200.0 —
RXS
400.0 —
t 200.0 —
RXH
400.0 —
= AV = 0.0 V, T
SS SS a
a
Max Unit Test Conditions
— t or
cyc
— t
subcyc
0.6 t
scyc
1 t or V
cyc CC
1 t Except the above
subcyc
— ns V
CC
— Except the above
— ns V
CC
— Except the above
= –20°C to +75°C (regular
= +75°C (Die) (including
Reference
Figure
Figure 16.4
Figure 16.4
= 4.0 V to 5.5 V Figure 16.5
= 4.0 V to 5.5 V Figure 16.5
Figure 16.5
= 4.0 V to 5.5 V Figure 16.5
Figure 16.5