Table of Contents
Advertisement
Block Diagram
Figure 9.19 shows a block diagram of the asynchronous event counter.
φ
φ/2
φ/4, φ/8
Edge sensing
AEVH
circuit
Edge sensing
AEVL
circuit
IRQAEC
[Legend]
ECPWCRH: Event counter PWM compare register H
ECPWDRH: Event counter PWM data register H
AEGSR:
Input pin edge select register
ECCSR:
Event counter control/status register
ECH:
Event counter H
ECL:
Event counter L
Figure 9.19 Block Diagram of Asynchronous Event Counter
Rev. 6.00, 08/04, page 302 of 628
PSS
Edge sensing
circuit
φ/2, φ/4,
φ/8, φ/16,
φ/32, φ/64
AEGSR
ECCR
OVH
OVL
ECPWCRH
PWM waveform generator
ECPWDRH
ECPWCRL: Event counter PWM compare register L
ECPWDRL: Event counter PWM data register L
ECCR:
Event counter control register
IRREC
ECCSR
ECH
(8 bits)
CK
ECL
(8 bits)
CK
To CPU interrupt
(IRREC2)
ECPWCRL
ECPWDRL
Advertisement
Table of Contents
