Table of Contents
Advertisement
PMR5—Port Mode Register 5
Bit
7
WKP
Initial value
0
Read/Write
R/W
PWCR2—PWM2 Control Register
Bit
7
Initial value
1
Read/Write
Clock Select
0
1
PWH Output Select (H8/38124 Group only)
0 10-bit PWM
1 Event counter PWM
Notes: 1. tφ: Period of PWM2 input clock
2. 1 on products other than the H8/38124 Group
Rev. 6.00, 08/04, page 572 of 628
6
5
WKP
WKP
7
6
5
0
0
R/W
R/W
P5
/WKP
n
0 Functions as P5
1 Functions as WKP
6
5
1
1
The input clock is φ (tφ *
0
with a minimum modulation width of 1/2φ
The input clock is φ/2 (tφ *
1
with a minimum modulation width of 1/φ
The input clock is φ/4 (tφ *
0
with a minimum modulation width of 2/φ
The input clock is φ/8 (tφ *
1
with a minimum modulation width of 4/φ
H'CC
4
3
WKP
WKP
WKP
4
3
0
0
R/W
R/W
/SEG
Pin Function Switch
n
n+1
I/O pin
n
input pin
n
H'CD
4
3
PWCR22
1
1
1
= 1/φ) The conversion period is 512/φ,
1
= 2/φ) The conversion period is 1,024/φ,
1
= 4/φ) The conversion period is 2,048/φ,
1
= 8/φ) The conversion period is 4,096/φ,
2
1
WKP
WKP
2
1
0
0
R/W
R/W
R/W
(n = 7 to 0)
10-Bit PWM
2
1
PWCR21
PWCR20
0 *
2
0
R/W
W
I/O Port
0
0
0
0
0
W
Advertisement
Table of Contents
