Table Of Contents - Renesas H8/38024 Hardware Manual

8-bit single-chip microcomputer h8 family/h8/300l super low power series
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1.1
Overview...........................................................................................................................
1.2
Internal Block Diagram.....................................................................................................
1.3
Pin Arrangement and Functions........................................................................................
1.3.1
Pin Arrangement ..................................................................................................
1.3.2
Pin Functions ....................................................................................................... 19
...................................................................................................................... 25
2.1
Overview........................................................................................................................... 25
2.1.1
Features................................................................................................................ 25
2.1.2
Address Space...................................................................................................... 26
2.1.3
Register Configuration......................................................................................... 26
2.2
Register Descriptions ........................................................................................................ 27
2.2.1
General Registers ................................................................................................. 27
2.2.2
Control Registers ................................................................................................. 27
2.2.3
Initial Register Values.......................................................................................... 29
2.3
Data Formats ..................................................................................................................... 29
2.3.1
Data Formats in General Registers ...................................................................... 30
2.3.2
Memory Data Formats ......................................................................................... 31
2.4
Addressing Modes............................................................................................................. 32
2.4.1
Addressing Modes ............................................................................................... 32
2.4.2
Effective Address Calculation.............................................................................. 34
2.5
Instruction Set ................................................................................................................... 38
2.5.1
Data Transfer Instructions.................................................................................... 40
2.5.2
Arithmetic Operations.......................................................................................... 42
2.5.3
Logic Operations.................................................................................................. 43
2.5.4
Shift Operations ................................................................................................... 43
2.5.5
Bit Manipulations................................................................................................. 45
2.5.6
Branching Instructions ......................................................................................... 49
2.5.7
System Control Instructions................................................................................. 51
2.5.8
Block Data Transfer Instruction........................................................................... 52
2.6
Basic Operational Timing ................................................................................................. 54
2.6.1
Access to On-Chip Memory (RAM, ROM)......................................................... 54
2.6.2
Access to On-Chip Peripheral Modules............................................................... 55
2.7
CPU States ........................................................................................................................ 57
2.7.1
Overview.............................................................................................................. 57
2.7.2
Program Execution State...................................................................................... 58
2.7.3
Program Halt State............................................................................................... 58
2.7.4
Exception-Handling State .................................................................................... 58
Contents
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Rev. 6.00, 08/04, page xix of xxx
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