6.5.2
Block Diagram
[Legend]
FLMCR1: Flash memory control register 1
FLMCR2: Flash memory control register 2
EBR:
Erase block register
FLPWCR: Flash memory power control register
FENR:
Flash memory enable register
Internal address bus
Internal data bus (16 bits)
FLMCR1
FLMCR2
Bus interface/controller
EBR
FLPWCR
FENR
Figure 6.7 Block Diagram of Flash Memory
Operating
Flash memory
(32 Kbytes)
Rev. 6.00, 08/04, page 153 of 628
TES pin
P95 pin
mode
P34 pin