Operation In Power-Down Modes - Renesas H8/38024 Hardware Manual

Table 13.3 Output Levels
Data
M
Static Common output
Segment output
1/2 duty Common output
Segment output
1/3 duty Common output
Segment output
1/4 duty Common output
Segment output
13.3.3

Operation in Power-Down Modes

This LSI the LCD controller/driver can be operated even in the power-down modes. The
operating state of the LCD controller/driver in the power-down modes is summarized in table
13.4.
In subactive mode, watch mode, and subsleep mode, the system clock oscillator stops, and
therefore, unless φw, φw/2, or φw/4 has been selected by bits CKS3 to CKS0, the clock will not be
supplied and display will halt. Since there is a possibility that a direct current will be applied to
the LCD panel in this case, it is essential to ensure that φw, φw/2, or φw/4 is selected. In active
(medium-speed) mode, the system clock is switched, and therefore CKS3 to CKS0 must be
modified to ensure that the frame frequency does not change.
Table 13.4 Power-Down Modes and Display Operation
Mode Reset Active
φ
Clock Runs
φw
Runs
Display ACT = 0 Stops
operation
ACT = 1 Stops
Notes: 1. The subclock oscillator does not stop, but clock supply is halted.
2. The LCD drive power supply is turned off regardless of the setting of the PSW bit.
3. Display operation is performed only if φw, φw/2, or φw/4 is selected as the operating
clock.
4. The clock supplied to the LCD stops.
0
0
V
1
V
1
V , V
2 3
V
1
V
3
V
2
V
3
V
2
Sleep Watch
Runs Runs Stops
Runs Runs Runs
Stops Stops Stops
Functions Functions Functions *
0 1
1 0
V V
SS 1
V V
SS SS
V , V V
2 3 1
V V
SS SS
V V
2 1
V V
3 SS
V V
2 1
V V
3 SS
M: LCD alternation signal
Sub- Sub-
active sleep
Stops Stops
Runs Runs
Stops Stops
3 Functions * 3 Functions *
Rev. 6.00, 08/04, page 421 of 628
1
1
V
SS
V
1
V
SS
V
1
V
SS
V
1
V
SS
V
1
Module
Standby Standby
Stops * 4
Stops
Stops * 1 Stops * 4
Stops * 2
Stops
3 Stops * 2
Stops