Renesas H8/38024 Hardware Manual page 115

Bit 4—Timer G Interrupt Request Flag (IRRTG)
Bit 4
IRRTG Description
0 Clearing conditions:
When IRRTG = 1, it is cleared by writing 0
1 Setting conditions:
When the TMIG pin is designated for TMIG input and the designated signal edge is
input, and when TCG overflows while OVIE is set to 1 in TMG
Bit 3—Timer FH Interrupt Request Flag (IRRTFH)
Bit 3
IRRTFH Description
0 Clearing conditions:
When IRRTFH = 1, it is cleared by writing 0
1 Setting conditions:
When TCFH and OCRFH match in 8-bit timer mode, or when TCF (TCFL, TCFH)
and OCRF (OCRFL, OCRFH) match in 16-bit timer mode
Bit 2—Timer FL Interrupt Request Flag (IRRTFL)
Bit 2
IRRTFL Description
0 Clearing conditions:
When IRRTFL = 1, it is cleared by writing 0
1 Setting conditions:
When TCFL and OCRFL match in 8-bit timer mode
Bit 1—Timer C Interrupt Request Flag (IRRTC)
Bit 1
IRRTC Description
0 Clearing conditions:
When IRRTC = 1, it is cleared by writing 0
1 Setting conditions:
When the timer C counter value overflows (from H'FF to H'00) or underflows (from
H'00 to H'FF)
(initial value)
(initial value)
(initial value)
(initial value)
Rev. 6.00, 08/04, page 85 of 628