Overview; Register Configuration And Description - Renesas H8/38024 Hardware Manual

8.10 Port A
8.10.1

Overview

Port A is a 4-bit I/O port, configured as shown in figure 8.9.
8.10.2

Register Configuration and Description

Table 8.26 shows the port A register configuration.
Table 8.26 Port A Registers
Name
Port data register A
Port control register A
Port Data Register A (PDRA)
Bit

Initial value

Read/Write
PDRA is an 8-bit register that stores data for port A pins PA
PCRA bits are set to 1, the values stored in PDRA are read, regardless of the actual pin states. If
port A is read while PCRA bits are cleared to 0, the pin states are read.
Upon reset, PDRA is initialized to H'F0.
Rev. 6.00, 08/04, page 226 of 628
Port A
Figure 8.9 Port A Pin Configuration
Abbr.
PDRA
PCRA
7 6 5
 
1 1 1
 
PA /COM
3 4
PA /COM
2 3
PA /COM
1 2
PA /COM
0 1
R/W Initial Value
R/W H'F0
W H'F0
4 3 2

PA PA
3
1 0 0

R/W R/W
to PA . If port A is read while
3 0
Address
H'FFDD
H'FFED
1 0
PA PA
2 1 0
0
0
R/W R/W