System Control Registers - Renesas H8/38024 Hardware Manual

10. On the H8/38124 Group, operates when φ
otherwise stops and stands by. On the H8/38024, H8/38024S, and H8/38024F-ZTAT Group, stops and stands by.
11. On the H8/38124 Group, operates only when the on-chip oscillator is selected; otherwise stops and stands by. On
the H8/38024, H8/38024S, and H8/38024F-ZTAT Group, stops and stands by.
5.1.1

System Control Registers

The operation mode is selected using the system control registers described in table 5.3.
Table 5.3 System Control Registers
Name
System control register 1
System control register 2
System Control Register 1 (SYSCR1)
Bit
SSBY
Initial value
Read/Write R/W
SYSCR1 is an 8-bit read/write register for control of the power-down modes.
Upon reset, SYSCR1 is initialized to H'07.
Bit 7—Software Standby (SSBY)
This bit designates transition to standby mode or watch mode.
Bit 7
SSBY Description
•
0
When a SLEEP instruction is executed in active mode,
a transition is made to sleep mode
•
When a SLEEP instruction is executed in subactive mode, a transition is made to
subsleep mode
•
1
When a SLEEP instruction is executed in active mode, a transition is made to
standby mode or watch mode
•
When a SLEEP instruction is executed in subactive mode, a transition is made to
watch mode
Rev. 6.00, 08/04, page 120 of 628
Abbreviation
SYSCR1
SYSCR2
7 6 5
STS2 STS1
0 0 0
R/W R/W
/32 is selected as the internal clock or the on-chip oscillator is selected;
W
R/W
R/W
R/W
4 3
STS0 LSON
0 0
R/W R/W
Initial Value Address
H'07 H'FFF0
H'F0 H'FFF1
2 1 0

MA1 MA0
1 1 1

R/W R/W
(initial value)