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AMR—A/D Mode Register
Bit
7
CKS
Initial value
0
Read/Write
R/W
Clock Select
Bit 7
CKS
0
1
Note: * Other than H8/38124 Group, operation is not guaranteed with
6
5
TRGE
0
1
R/W
Channel Select
Bit 3
CH3
0
1
1
External Trigger Select
0 Disables start of A/D conversion by external trigger
1 Enables start of A/D conversion by rising or falling edge
of external trigger at pin ADTRG
Conversion Period
62/φ
31/φ
a conversion time of less than 12.4 µs.
Select a setting that gives a conversion time of at least 12.4 µs.
In the case of H8/38124 Group, select a setting that gives
a conversion time of at least 7.8 µs.
H'C6
4
3
CH3
CH2
1
0
R/W
R/W
Bit 2
Bit 1
Bit 0
CH2
CH1
CH0
*
*
0
1
0
0
1
1
0
1
0
0
0
1
1
0
1
*
*
1
Conversion Time
φ = 1 MHz
φ = 5 MHz
62 µs
12.4 µs
31 µs
*
Rev. 6.00, 08/04, page 567 of 628
A/D Converter
2
1
0
CH1
CH0
0
0
0
R/W
R/W
Analog Input Channel
No channel selected
AN
0
AN
1
AN
2
AN
3
AN
4
AN
5
AN
6
AN
7
Do not specify this
combination
*: Don't care
φ = 8 MHz
7.8 µs
*
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