Renesas H8/38024 Hardware Manual page 367

8-bit single-chip microcomputer h8 family/h8/300l super low power series
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Table 10.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2)
10 MHz
Bit Rate
(bit/s)
n
N
110
3
21
150
3
15
200
3
11
250
3
9
300
3
7
600
3
3
1200
3
1
2400
3
0
4800
2
1
9600
2
0
19200
0
7
31250
0
4
38400
0
3
Notes: No indication: Setting not possible.
—: Setting possible, but errors may result.
1. The value set in BRR is given by the following equation:
N =
(64 • 2
where
B:
N:
OSC: Value of φ
n:
2. The error in table 10.3 is the value obtained from the following equation, rounded to two
decimal places.
Error (%) =
OSC
16 MHz
Error
Error
(%)
n
N
(%)
0.88
3
35
–1.36
1.73
3
25
0.16
1.73
3
19
–2.34
–2.34 3
15
–2.34
1.73
3
12
0.16
1.73
2
25
0.16
1.73
2
12
0.16
1.73
0
103 0.16
1.73
0
51
0.16
173
0
25
0.16
1.73
0
12
0.16
0
0
7
0
1.73
OSC
– 1
2n
• B)
Bit rate (bit/s)
Baud rate generator BRR setting (0 ≤ N ≤ 255)
(Hz)
OSC
Baud rate generator input clock number (n = 0, 2, or 3)
(The relation between n and the clock is shown in table 10.4.)
B (rate obtained from n, N, OSC) – R(bit rate in left-hand column in table 10.3.)
R (bit rate in left-hand column in table 10.3.)
Rev. 6.00, 08/04, page 337 of 628
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