Table of Contents
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9.6.1
Overview.............................................................................................................. 290
9.6.2
Register Descriptions ........................................................................................... 293
9.6.3
Timer Operation................................................................................................... 299
9.6.4
Watchdog Timer Operation States ....................................................................... 300
9.7
Asynchronous Event Counter (AEC) ................................................................................ 301
9.7.1
Overview.............................................................................................................. 301
9.7.2
Register Configurations ....................................................................................... 304
9.7.3
Operation ............................................................................................................. 313
9.7.4
Asynchronous Event Counter Operation Modes.................................................. 317
9.7.5
Application Notes ................................................................................................ 318
10.1 Overview........................................................................................................................... 319
10.1.1 Features................................................................................................................ 319
10.1.2 Block Diagram ..................................................................................................... 321
10.1.3 Pin Configuration................................................................................................. 322
10.1.4 Register Configuration......................................................................................... 322
10.2 Register Descriptions ........................................................................................................ 323
10.2.1 Receive Shift Register (RSR) .............................................................................. 323
10.2.2 Receive Data Register (RDR) .............................................................................. 323
10.2.3 Transmit Shift Register (TSR) ............................................................................. 324
10.2.4 Transmit Data Register (TDR)............................................................................. 324
10.2.5 Serial Mode Register (SMR)................................................................................ 325
10.2.6 Serial Control Register 3 (SCR3)......................................................................... 328
10.2.7 Serial Status Register (SSR) ................................................................................ 332
10.2.8 Bit Rate Register (BRR) ...................................................................................... 336
10.2.9 Clock stop register 1 (CKSTPR1)........................................................................ 342
10.2.10 Serial Port Control Register (SPCR).................................................................... 342
10.3 Operation........................................................................................................................... 344
10.3.1 Overview.............................................................................................................. 344
10.3.2 Operation in Asynchronous Mode ....................................................................... 348
10.3.3 Operation in Synchronous Mode ......................................................................... 357
10.3.4 Multiprocessor Communication Function............................................................ 364
10.4 Interrupts ........................................................................................................................... 371
10.5 Application Notes ............................................................................................................. 372
11.1 Overview........................................................................................................................... 377
11.1.1 Features................................................................................................................ 377
11.1.2 Block Diagram ..................................................................................................... 378
11.1.3 Pin Configuration................................................................................................. 379
11.1.4 Register Configuration......................................................................................... 380
11.2 Register Descriptions ........................................................................................................ 380
..................................................................................................... 377
................................................................ 319
Rev. 6.00, 08/04, page xxv of xxx
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