Renesas H8/38024 Hardware Manual page 20

2.8 Memory Map .................................................................................................................... 59
2.8.1 Memory Map ....................................................................................................... 59
2.9 Application Notes ............................................................................................................. 64
2.9.1 Notes on Data Access .......................................................................................... 64
2.9.2 Notes on Bit Manipulation................................................................................... 66
2.9.3 Notes on Use of the EEPMOV Instruction .......................................................... 72
Section 3 Exception Handling
3.1 Overview........................................................................................................................... 73
3.2 Reset.................................................................................................................................. 73
3.2.1 Overview.............................................................................................................. 73
3.2.2 Reset Sequence .................................................................................................... 73
3.2.3 Interrupt Immediately after Reset ........................................................................ 74
3.3 Interrupts........................................................................................................................... 75
3.3.1 Overview.............................................................................................................. 75
3.3.2 Interrupt Control Registers .................................................................................. 77
3.3.3 External Interrupts ............................................................................................... 87
3.3.4 Internal Interrupts ................................................................................................ 88
3.3.5 Interrupt Operations ............................................................................................. 89
3.3.6 Interrupt Response Time...................................................................................... 94
3.4 Application Notes ............................................................................................................. 95
3.4.1 Notes on Stack Area Use ..................................................................................... 95
3.4.2 Notes on Rewriting Port Mode Registers............................................................. 96
3.4.3 Method for Clearing Interrupt Request Flags ...................................................... 98
Section 4 Clock Pulse Generators
4.1 Overview........................................................................................................................... 101
4.1.1 Block Diagram..................................................................................................... 101
4.1.2 System Clock and Subclock................................................................................. 102
4.1.3 Register Descriptions ........................................................................................... 102
4.2 System Clock Generator ................................................................................................... 104
4.3 Subclock Generator........................................................................................................... 109
4.4 Prescalers .......................................................................................................................... 111
4.5 Note on Oscillators ........................................................................................................... 112
4.5.1 Definition of Oscillation Stabilization Wait Time ............................................... 113
4.5.2 Notes on Use of Crystal Oscillator Element (Excluding Ceramic Oscillator
Element)............................................................................................................... 115
4.5.3 Note on Use of HD64F38024 .............................................................................. 116
4.6 Notes on H8/38124 Group ................................................................................................ 116
Section 5 Power-Down Modes
5.1 Overview........................................................................................................................... 117
5.1.1 System Control Registers..................................................................................... 120
Rev. 6.00, 08/04, page xx of xxx
......................................................................................... 73
................................................................................... 101
........................................................................................ 117