Port Mode Register 2 (PMR2)
Bit
7
—
Initial value
1
Read/Write
—
PMR2 is an 8-bit read/write register, mainly controlling the selection of pin functions for port 2.
Only the bit relating to the watchdog timer is described here. For details of the other bits, see
section 8, I/O Ports.
Bit 2—Watchdog Timer Source Clock Select (WDCKS)
This bit selects the watchdog timer source clock. Note that stabilization times for the H8/38024,
H8/38024S, and H8/38024F-ZTAT Group and for the H8/38124 Group are different.
• H8/38024, H8/38024S, H8/38024F-ZTAT Group
WDCKS
Description
φ/8192 selected
0
φw/32 selected
1
• H8/38124 Group
WDCKS
Description
0
Selects clock based on timer mode register W (TMW) setting
φw/32 selected
1
Rev. 6.00, 08/04, page 298 of 628
6
5
—
POF1
—
1
0
—
R/W
—
4
3
2
—
WDCKS
1
1
0
—
R/W
1
0
NCS
IRQ0
0
0
R/W
R/W
(initial value)
(initial value)