5.3.3
Oscillator Stabilization Time after Standby Mode is Cleared
Bits STS2 to STS0 in SYSCR1 should be set as follows.
Note that stabilization times for the H8/38024, H8/38024S, and H8/38024F-ZTAT Group and for
the H8/38124 Group are different.
• When a oscillator is used
The table below gives settings for various operating frequencies. Set bits STS2 to STS0 for a
wait time at least as long as the oscillation stabilization time.
Table 5.4(1) Clock Frequency and Stabilization Time
(H8/38024, H8/38024S, H8/38024F-ZTAT Group)
STS2
STS1
0
0
1
1
0
1
Table 5.4(2) Clock Frequency and Stabilization Time
(H8/38124 Group)
STS2
STS1
0
0
1
1
0
1
STS0
Wait Time
0
8,192 states
1
16,384 states
0
1,024 states
1
2,048 states
0
4,096 states
1
2 states
(Use prohibited)
0
8 states
1
16 states
STS0
Wait Time
0
8,192 states
1
16,384 states
0
32,768 states
1
65,536 states
0
131,072 states
1
2 states
(Use prohibited)
0
8 states
1
16 states
5 MHz
2 MHz
1.638
4.1
3.277
8.2
0.205
0.512
0.410
1.024
0.819
2.048
0.0004
0.001
0.002
0.004
0.003
0.008
5 MHz
2 MHz
1.638
4.1
3.277
8.2
6.554
16.4
13.108
32.8
26.216
65.5
0.0004
0.001
0.002
0.004
0.003
0.008
Rev. 6.00, 08/04, page 127 of 628
(Unit: ms)
(Unit: ms)