Pin Arrangement And Functions; Pin Arrangement - Renesas H8/38024 Hardware Manual

8-bit single-chip microcomputer h8 family/h8/300l super low power series
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1.3

Pin Arrangement and Functions

1.3.1

Pin Arrangement

The H8/38024 Group, H8/38024S Group, and H8/38124 Group pin arrangements are shown in
figures 1.2, 1.3, and 1.4. The bonding pad location diagram of the HCD64338024, HCD64338023,
HCD64338022, HCD64338021, and HCD64338020 is shown in figure 1.5. The bonding pad
coordinates of the HCD64338024, HCD64338023, HCD64338022, HCD64338021, and
HCD64338020 are given in table 1.2. The bonding pad location diagram of the HCD64F38024,
HCD64F38024R is shown in figure 1.6. The bonding pad coordinates of the HCD64F38024 are
given in table 1.3. The bonding pad location diagram of the HCD64338024S, HCD64338023S,
HCD64338022S, HCD64338021S, and HCD64338020S is shown in figure 1.7. The bonding pad
coordinates of the HCD64338024S, HCD64338023S, HCD64338022S, HCD64338021S, and
HCD64338020S are given in table 1.4.
P3
P3
/TMOFL
1
P3
/TMOFH
2
P3
6
P3
P4
0
P4
1
P4
2
P4
PB
PB
PB
PB
/AN
/IRQ
3
3
PB
PB
PB
PB
Note: If the on-chip emulator is used, pins 95, 33, 34, and 35 are reserved for the emulator and not available to the user.
Figure 1.2(1) Pin Arrangement (FP-80A, TFP-80C: Top View,
H8/38024 Group, H8/38024F-ZTAT Group, H8/38024S Group)
/UD
61
0
62
63
P3
64
3
P3
65
4
P3
66
5
/AEVH
67
/AEVL
68
7
/SCK
69
32
/RXD
70
32
/TXD
71
32
/IRQ
72
3
0
/AN
73
0
0
/AN
74
1
1
/AN
75
2
2
/TMIC
76
1
/AN
77
4
4
/AN
78
5
5
/AN
79
6
6
/AN
80
7
7
FP-80A, TFP-80C
(Top view)
P8
/SEG
40
3
28
P8
/SEG
39
2
27
38
P8
/SEG
1
26
37
P8
/SEG
0
25
36
P7
/SEG
7
24
P7
/SEG
35
6
23
P7
/SEG
34
5
22
33
P7
/SEG
4
21
32
P7
/SEG
3
20
31
P7
/SEG
2
19
P7
/SEG
30
1
18
P7
/SEG
29
0
17
28
P6
/SEG
7
16
27
P6
/SEG
6
15
26
P6
/SEG
5
14
P6
/SEG
25
4
13
P6
/SEG
24
3
12
23
P6
/SEG
2
11
22
P6
/SEG
1
10
21
P6
/SEG
0
9
Rev. 6.00, 08/04, page 9 of 628

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