Renesas H8/38024 Hardware Manual page 110

Bits 1 and 0—IRQ
1
Bits 1 and 0 enable or disable IRQ
Bit n
IENn Description
Disables interrupt requests from pin IRQn
0
Enables interrupt requests from pin IRQn
1
Interrupt Enable Register 2 (IENR2)
Bit
IENDT
Initial value
Read/Write R/W
IENR2 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7—Direct Transfer Interrupt Enable (IENDT)
Bit 7 enables or disables direct transfer interrupt requests.
Bit 7
IENDT Description
0 Disables direct transfer interrupt requests
1 Enables direct transfer interrupt requests
Bit 6—A/D Converter Interrupt Enable (IENAD)
Bit 6 enables or disables A/D converter interrupt requests.
Bit 6
IENAD Description
0 Disables A/D converter interrupt requests
1 Enables A/D converter interrupt requests
Bit 5—Reserved
Bit 5 is reserved bit: it can only be written with 0.
Rev. 6.00, 08/04, page 80 of 628
and IRQ Interrupt Enable (IEN1 and IEN0)
0
and IRQ
1
7 6 5
IENAD —
0 0 —
R/W W
interrupt requests.
0
4 3
IENTG IENTFH
0 0
R/W R/W
(initial value)
(n = 1 or 0)
2 1
IENTFL IENTC IENEC
0 0
R/W R/W
(initial value)
(initial value)
0
0
R/W