Renesas H8/38024 Hardware Manual page 11

Item
8.1 Overview
Table 8.1 Port
Functions
8.9.1 Overview
Figure 8.8 Port 9 Pin
Configuration
9.2.1 Overview
9.4.2 Register
Descriptions
9.6.1 Overview
Figure 9.17 (2) Block
Diagram of Watchdog
Timer (H8/38124
Group)
Page Revisions (See Manual for Details)
187, Table 8.1 amended
188
Port Description
•
Port 3
8-bit I/O port
•
MOS input pull-up
option
•
Large-current
port *
•
MOS open drain
output selectable
(only P3
(Before) Input terminal → (After) input pin
222 Figure 8.8 figure title amended
238 Features
Description deleted
• Use of module standby mode enables this module to be
placed in standby mode independently when not used.
258 Timer Control Register F (TCRF)
Bits 2 to—Clock Select L (CKSL2 to CKSL0)
Note * amended
Note: * .... Note that the timer F counter may increment if the
setting of IRQ3 in port mode register 1 (PMR1) is changed from
0 to 1 or from 1 to 0 while the TMIF pin is low order to changed
the TMIF pin function.
290 Feature
• On-chip the H8/38/124 Group, 10 internal clocks (φ/64, φ/128,
φ/256, φ/512, φ/1024, φ/2048, φ/4096, φ/8192, φw/32, or
watchdog on-chip oscillator) are available for selection for use
by the counter.
292 Block Diagram
Figure amended
(Before) On-chip oscillator → (After) Watchdog on-chip
oscillator
Pins
P3 /AEVL
7
P3 /AEVH
6
P3 to P3
5 3
P3 , TMOFH
2
P3 , TMOFL
2
1
P3 /UD
0
)
5
Rev. 6.00, 08/04, page xi of xxx
Function
Switching
Other Functions Registers
Asynchronous counter event PMR3
input pins AEVL, AEVH ECCR
None PMR2
PMR3
Timer F output compare
output
Timer C count up/down PMR3
selection input