Renesas H8/38024 Hardware Manual page 589

TCSRF—Timer Control/Status Register F
Bit 7
OVFH
Initial value 0
R/(W) *
Read/Write
Timer Overflow Flag L
0
1
Counter Clear H
0
1
Timer Overflow Interrupt Enable H
TCFH overflow interrupt request is disabled
0
1 TCFH overflow interrupt request is enabled
Compare Match Flag H
0 Clearing condition:
After reading CMFH = 1, cleared by writing 0 to CMFH
1
Setting condition:
Set when the TCFH value matches the OCRFH value
Timer Overflow Flag H
0
Clearing condition:
After reading OVFH = 1, cleared by writing 0 to OVFH
1 Setting condition:
Set when TCFH overflows from H'FF to H'00
Note: * Bits 7, 6, 3, and 2 can only be written with 0, for flag clearing.
6 5
CMFH OVIEH
0 0
R/(W) *
R/W
Counter Clear L
0 TCFL clearing by compare match is disabled
1 TCFL clearing by compare match is enabled
Timer Overflow Interrupt Enable L
0 TCFL overflow interrupt request is disabled
1 TCFL overflow interrupt request is enabled
Compare Match Flag L
0 Clearing condition:
After reading CMFL = 1, cleared by writing 0 to CMFL
Setting condition:
1
Set when the TCFL value matches the OCRFL value
Clearing condition:
After reading OVFL = 1, cleared by writing 0 to OVFL
Setting condition:
Set when TCFL overflows from H'FF to H'00
16-bit mode: TCF clearing by compare match is disabled
8-bit mode: TCFH clearing by compare match is disabled
16-bit mode: TCF clearing by compare match is enabled
8-bit mode: TCFH clearing by compare match is enabled
H'B7
4 3
CCLRH OVFL CMFL
0 0
R/(W) * R/(W) *
R/W
Rev. 6.00, 08/04, page 559 of 628
2 1 0
OVIEL CCLRL
0 0 0
R/W R/W
Timer F