Renesas H8/38024 Hardware Manual page 459

Bits 6 to 4—Reserved
These bits are read/write enabled reserved bits.
Bit 3—Reference Voltage External Input Select (VREFSEL)
This bit is used to select the reference voltage.
Bit 3
VREFSEL Description
0 The on-chip circuit is used to generate the reference voltage
1 The reference voltage is input to the Vref pin from an external source
Bit 2—Reserved
This bit is reserved. It is always read as 0 and cannot be written to.
Bit 1—LVD Power Supply Voltage Drop Flag (LVDDF)
This bit indicates when a power supply voltage drop has been detected.
Bit 1
LVDDF Description
0 [Clearing condition]
When 0 is written after reading 1
1 [Setting condition]
When the power supply voltage drops below Vint(D)
Bit 0—LVD Power Supply Voltage Rise Flag (LVDUF)
This bit indicates when a power supply voltage rise has been detected.
Bit 0
LVDUF Description
0 [Clearing condition]
When 0 is written after reading 1
1 [Setting condition]
When the power supply voltage drops below Vint(D) while the LVDUE bit in
LVDCR is set to 1, and it rises above Vint(U) before dropping below Vreset1
(initial value)
(initial value)
(initial value)
Rev. 6.00, 08/04, page 429 of 628