Renesas H8/38024 Hardware Manual page 559

8-bit single-chip microcomputer h8 family/h8/300l super low power series
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Instruction
Mnemonic
MOV
MOV.W Rs, @Rd
MOV.W Rs, @(d:16, Rd)
MOV.W Rs, @–Rd
MOV.W Rs, @aa:16
MULXU
MULXU.B Rs, Rd
NEG
NEG.B Rd
NOP
NOP
NOT
NOT.B Rd
OR
OR.B #xx:8, Rd
OR.B Rs, Rd
ORC
ORC #xx:8, CCR
ROTL
ROTL.B Rd
ROTR
ROTR.B Rd
ROTXL
ROTXL.B Rd
ROTXR
ROTXR.B Rd
RTE
RTE
RTS
RTS
SHAL
SHAL.B Rd
SHAR
SHAR.B Rd
SHLL
SHLL.B Rd
SHLR
SHLR.B Rd
SLEEP
SLEEP
STC
STC CCR, Rd
SUB
SUB.B Rs, Rd
SUB.W Rs, Rd
SUBS
SUBS.W #1, Rd
SUBS.W #2, Rd
POP
POP Rd
PUSH
PUSH Rs
SUBX
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
XOR
XOR.B #xx:8, Rd
XOR.B Rs, Rd
XORC
XORC #xx:8, CCR
Instruction
Branch
Fetch
Addr. Read
I
J
1
2
1
2
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Stack
Byte Data
Operation
Access
K
L
2
1
1
1
Rev. 6.00, 08/04, page 529 of 628
Word Data
Internal
Access
Operation
M
N
1
1
1
2
1
12
2
2
2
2

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