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Clock Levels Before and After
No.
Modifying Bits CKS1 and CKS0
4
Goes from high level to high level
Note: * The switchover is seen as a falling edge, and TCG is incremented.
Notes on Port Mode Register Modification
The following points should be noted when a port mode register is modified to switch the input
capture function or the input capture input noise canceler function.
• Switching input capture input pin function
Note that when the pin function is switched by modifying TMIG in port mode register 1
(PMR1), which performs input capture input pin control, an edge will be regarded as having
been input at the pin even though no valid edge has actually been input. Input capture input
signal input edges, and the conditions for their occurrence, are summarized in table 9.14.
Table 9.14 Input Capture Input Signal Input Edges Due to Input Capture Input Pin
Switching, and Conditions for Their Occurrence
Input Capture Input
Signal Input Edge
Generation of rising edge
Generation of falling edge
Note: When the P1
3
signal is low.
Rev. 6.00, 08/04, page 286 of 628
Conditions
When TMIG is modified from 0 to 1 while the TMIG pin is high
When NCS is modified from 0 to 1 while the TMIG pin is high, then
TMIG is modified from 0 to 1 before the signal is sampled five times by
the noise canceler
When TMIG is modified from 1 to 0 while the TMIG pin is high
When NCS is modified from 0 to 1 while the TMIG pin is low, then
TMIG is modified from 0 to 1 before the signal is sampled five times by
the noise canceler
When NCS is modified from 0 to 1 while the TMIG pin is high, then
TMIG is modified from 1 to 0 after the signal is sampled five times by
the noise canceler
pin is not set as an input capture input pin, the timer G input capture input
TCG Operation
Clock before
switching
Clock after
switching
Count
clock
TCG
N
N+1
N+2
Write to CKS1 and CKS0
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