Renesas H8/38024 Hardware Manual page 464

The reference voltage, power supply voltage drop detection level, and power supply voltage rise
detection level can be input to the LSI from external sources via the Vref, extD, and extU pins.
Figure 14.5 shows the operational timing using input from the Vref, extD, and extU pins.
First, make sure that the voltages input to pins extD and extU are set to higher levels than the
interrupt detection voltage Vexd. After initial settings are made, a power supply drop interrupt is
generated if the extD input voltage drops below Vexd. After a power supply drop interrupt is
generated, if the external power supply voltage rises and the extU input voltage rises higher than
Vexd, a power supply rise interrupt is generated. As with the on-chip circuit, the above function
should be used in conjunction with LVDR (Vreset1) when the LVDI function is used.
External power
supply voltage
extD input voltage
extU input voltage
LVDINTD
LVDDF
LVDINTU
LVDUF
Figure 14.5 Operational Timing of Low-Voltage Detection Interrupt Circuit
Rev. 6.00, 08/04, page 434 of 628
(1)
(2)
IRQ0 interrupt
generated
(Using Pins Vref, extD, and extU)
(3)
IRQ0 interrupt
generated
Vexd
(4)
Vreset1
V
SS