Appendix D Port States In The Different Processing States - Renesas H8/38024 Hardware Manual

Appendix D Port States in the Different Processing States

Table D.1 Port States Overview
Port Reset
P1 , High
7
3
*
P1 , impedance
6
P1 ,
4
P1
3
P3 to High
7
P3 impedance
0
P4 to High
3
P4 impedance
0
P5 to High
7
P5 impedance
0
P6 to High
7
P6 impedance
0
P7 to High
7
P7 impedance
0
P8 to High
7
P8 impedance
0
P9 to High
5
P9 impedance
0
PA to High
3
PA impedance
0
PB to High
7
PB impedance
0
Notes: 1. High level output when MOS pull-up is in on state.
2. In the HD64F38024 the previous pin state is retained.
3. Not implemented on H8/38124 Group.
Sleep Subsleep
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
High High
impedance impedance
Standby Watch
High Retained
1
impedance *
High Retained
1
impedance *
High Retained
impedance
High Retained
1 2
impedance * *
High Retained
1
impedance *
High Retained
impedance
High Retained
impedance
High Retained
1
impedance *
High Retained
impedance
High High
impedance impedance
Rev. 6.00, 08/04, page 615 of 628
Subactive Active
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
High High
impedance impedance