Register Configuration - Renesas H8/38024 Hardware Manual

6.5.4

Register Configuration

Table 6.5 lists the register configuration to control the flash memory when the built in flash
memory is effective.
Table 6.5 Register Configuration
Register Name
Flash memory control register 1
Flash memory control register 2
Flash memory power control register
Erase block register
Flash memory enable register
Note: FLMCR1, FLMCR2, FLPWCR, EBR, and FENR are 8 bit registers. Only byte access is
enabled which are two-state access. These registers are dedicated to the product in which
flash memory is included. The product in which PROM or ROM is included does not have
these registers. When the corresponding address is read in these products, the value is
undefined. A write is disabled.
Abbreviation R/W
FLMCR1 R/W
FLMCR2 R
FLPWCR R/W
EBR R/W
FENR R/W
Initial Value
H'00
H'00
H'00
H'00
H'00
Rev. 6.00, 08/04, page 155 of 628
Address
H'F020
H'F021
H'F022
H'F023
H'F02B