Renesas H8/38024 Hardware Manual page 200

8-bit single-chip microcomputer h8 family/h8/300l super low power series
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Increment address
Rev. 6.00, 08/04, page 170 of 628
Erase start
SWE bit ← 1
Wait 1 µs
n ← 1
Set EBR
Enable WDT
ESU bit ← 1
Wait 100 µs
E bit ← 1
Wait 10 ms
E bit ← 0
Wait 10 µs
ESU bit ← 0
Wait 10 µs
Disable WDT
EV bit ← 1
Wait 20 µs
Set block start address as verify address
H'FF dummy write to verify address
Wait 2 µs
Read verify data
Verify data = all 1s ?
Yes
No
Last address of block ?
Yes
EV bit ← 0
Wait 4 µs
No
All erase block erased ?
Yes
SWE bit ← 0
Wait 100 µs
End of erasing
Figure 6.11 Erase/Erase-Verify Flowchart
No
EV bit ← 0
Wait 4µs
Yes
n ≤100 ?
No
SWE bit ← 0
Wait 100 µs
Erase failure
n ← n + 1

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