Fujitsu MB91319 Series Hardware Manual page 56

Fr60 32-bit microcontroller
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CHAPTER 3 CPU AND CONTROL UNITS
■ Overview of Instructions
The FR supports the general RISC instruction set as well as logical operation, bit manipulation,
and direct addressing instructions optimized for embedded applications. For the instruction set,
see "APPENDIX I Instruction Lists". Each instruction is 16-bit long (except for some instructions
are 32- or 48-bit long), resulting in superior efficiency of memory use.
An instruction set is classified into the following function groups:
Arithmetic operation
Load and store
Branch
Logical operation and bit manipulation
Direct addressing
Other
❍ Arithmetic operation
Arithmetic operation instructions include standard arithmetic operation instructions (addition,
subtraction, and comparison) and shift instructions (logical shift and arithmetic shift). The addition
and subtraction instructions include an operation with carries for use with multiple-word-length
operations and an operation that does not change flag values, a convenience in address
calculations.
Furthermore, 32-bit-by-32-bit and 16-bit-by-16-bit multiplication instructions and a 32-bit-by-32-bit
step division instruction are provided.
Additionally, an immediate data transfer instruction that sets immediate data in a register and a
register-to-register transfer instruction are provided.
An arithmetic operation instruction is executed using the general-purpose registers and the
multiplication and division registers in the CPU.
❍ Load and store
Load and store instructions read and write to external memory. They are also used to read and
write to a peripheral circuit (I/O) on the chip.
Load and store instructions have three access lengths: byte, halfword, and word. In addition to
indirect memory addressing via general registers, indirect memory addressing via registers with
displacements and via registers with register incrementing or decrementing are provided for some
instructions.
❍ Branch
The branch group includes branch, call, interrupt, and return instructions. Some branch
instructions have delay slots while others do not. These may be optimized according to the
application. The branch instructions are described in detail later.
❍ Logical operation and bit manipulation
Logical operation instructions perform the AND, OR, and EOR logical operations between
general-purpose registers or a general-purpose register and memory (and I/O). Bit manipulation
instructions directly manipulate the contents of memory (and I/O). They access memory using
general register indirect addressing.
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