Fujitsu MB91319 Series Hardware Manual page 708

APPENDIX B Interrupt Vector
Table B-1 Interrupt Vector (2 / 3)
Interrupt source
Reserved for system
Reload timer 0
Reload timer 1
Reload timer 2
UART0 (Reception completed)
UART1 (Reception completed)
UART2 (Reception completed)
UART0 (Transmission completed)
UART1 (Transmission completed)
UART2 (Transmission completed)
DMAC0 (end or error)
DMAC1 (end or error)
DMAC2 (end or error)
DMAC3 (end or error)
DMAC4 (end or error)
A/D
PPG0
PPG1
PPG2
PPG3
DWC
CCD0
CCD1
Main oscillation wait
Timebase timer overflow
Reserved for system
Watch timer
2
I C ch0
2
I C ch1
2
I C ch2
2
I C ch3
686
Interrupt number
Interrupt
Hexa-
level
Decimal
decimal
23 17 ICR07
24 18 ICR08
25 19 ICR09
26 1A ICR10
27 1B ICR11
28 1C ICR12
29 1D ICR13
30 1E ICR14
31 1F ICR15
32 20 ICR16
33 21 ICR17
34 22 ICR18
35 23 ICR19
36 24 ICR20
37 25 ICR21
38 26 ICR22
39 27 ICR23
40 28 ICR24
41 29 ICR25
42 2A ICR26
43 2B ICR27
44 2C ICR28
45 2D ICR29
46 2E ICR30
47 2F ICR31
48 30 ICR32
49 31 ICR33
50 32 ICR34
51 33 ICR35
52 34 ICR36
53 35 ICR37
Address of
Offset
TBR default
3A0 000FFFA0
H
39C 000FFF9C
H
398 000FFF98
H
394 000FFF94
H
390 000FFF90
H
38C 000FFF8C
H
388 000FFF88
H
384 000FFF84
H
380 000FFF80
H
37C 000FFF7C
H
378 000FFF78
H
374 000FFF74
H
370 000FFF70
H
36C 000FFF6C
H
368 000FFF68
H
364 000FFF64
H
360 000FFF60
H
35C 000FFF5C
H
358 000FFF58
H
354 000FFF54
H
350 000FFF50
H
34C 000FFF4C
H
348 000FFF48
H
344 000FFF44
H
340 000FFF40
H
33C 000FFF3C
H
338 000FFF38
H
334 000FFF34
H
330 000FFF30
H
32C 000FFF2C
H
328 000FFF28
H
RN
-
H
8
H
9
H
10
H
0
H
1
H
2
H
3
H
4
H
5
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H
-
H