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Notes:
• If DMA start resulting from an interrupt from a function is set (IS=1xxxx), disable interrupts from
the selected peripheral function with the ICR register.
• If demand transfer mode is selected, only IS[4:0]=01110, 01111 can be set. Starting by other
sources is disabled.
• External request input is valid only for CH0, CH1, and CH2. External request input cannot be
selected for CH3 and CH4. Whether level detection or edge detection is used is determined by
the mode setting. Level detection is selected for demand transfer. (For all other cases, edge
detection is selected.)
[bit23 to bit20] DDNO3 to DDNO0 (direct access number)*:Fly-by function for built-in
These bits specify the built-in peripheral of the transfer destination/source used by the
corresponding channel.
Table 16.2-2 shows the settings of the direct access number.
Table 16.2-2 Settings of the Direct Access Number
DDN0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
•
When reset: Initialized to 0000.
•
These bits are readable and writable.
Function
Setting disabled
No use
No use
No use
No use
No use
No use
No use
No use
No use
No use
No use
No use
No use
No use
Setting disabled
CHAPTER 16 DMA CONTROLLER (DMAC)
peripherals
327
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