Fujitsu MB91319 Series Hardware Manual page 701

Table A-1 I/O Map (9 / 9)
Address
+0
000B64
H
000B68
H
000B6C
H
000B70
H
|
000FFC
H
001000
H
001004
H
001008
H
00100C
H
001010
H
001014
H
001018
H
00101C
H
001020
H
001024
H
001028
H
|
006FFC
H
FLCR [R/W]
007000
H
0110_0000
FLWC [R/W]
007004
H
0001_0011
007008
H
|
0070FF
H
*1:Register whose initial value depends on the reset level. The registers at the INIT level are indicated.
*2:Register whose initial value depends on the reset level. The registers at the INIT level due to the INIT pin
are indicated.
*3:Reserved register. Access is disabled.
Register
+1
EOAM1/EODM1 [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
EOD0 [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
EOD1 [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
--------
DMASA0 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMADA0 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMASA1 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMADA1 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMASA2 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMADA2 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMASA3 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMADA3 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMASA4 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
DMADA4 [R/W]
XXXXXXXX_XXXXXXXX_XXXXXXXX_XXXXXXXX
+2
-
-
-
-
APPENDIX A I/O Map
Block
+3
DSU
Reserved
DMAC
Reserved
Program FLASH I/F
Reserved
679