Table of Contents
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Main changes in this edition
Page
Change pin names
(TO0 → TOUT0)
-
(TO1 → TOUT1)
(TO2 → TOUT2)
Change ■ Built-in RAM (MASK: Add 32KB RAM)
3
Change ■ A/D Converter (conversion time: about 10 µs → conversion time: about 8.5 µs)
4
Change CMOS technology of ■ Other Features
6
Change Supply voltage of ■ Other Features
6
Change the Figure 1.2-1 Block Diagram
(Add DSU)
(Add MASK 512KB to Flash 1MB)
7
(Add MASK 32KB to RAM)
(PWC 1ch
(Add Font ROM product)
Change Figure 1.4-1 Pin Layout of the MB91319
(MB91F318A
9
(MB91FV319A
(Change the Note)
Add a sentence to ■ Quartz Oscillation Circuit
24
Change Low Power Consumption Mode of ■ Limitations
26
Change Note on using A/D
27
Add About Software Reset of Synchronous Mode
27
Change ❍ Unique characteristic of the evaluation chip MB91FV319A
28
(MB91FV319A → MB91FV319A/R)
Change Figure 3.1-1 Memory Map
30
(MB91F318
(MB91F318, MB91316
Add Reference: to ■ Software Reset (STCR: SRST Bit Writing)
70
Change ■ Watchdog Reset (watchdog reset postpone register (WPR) → time base counter clear
70
register (CTBR))
Add Reference: to ■ Synchronous Reset Operation
74
Add items to Notes: for ■ External Bus Clock (CLKT)
81
Change Figure 3.11-1 Block Diagram of Clock Generation Controller
83
(Delete WPR register)
Change [bit9, bit8] WT1, WT0 (Watchdog interval Time select) (WPR → CTBR)
85
Add Reference: to [bit4] SRST (Software ReSeT)
87
Add Note: to [bit9] SYNCR (SYNChronous Reset enable)
90
Changes (For details, refer to main body.)
→
PWC 4ch)
→
MB91F318A/S)
→
MB91FV319A/R)
→
MB91F318A/S and MB91FV319R)
→
MB91F318A/S, MB91316)
xv
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