Fujitsu MB91319 Series Hardware Manual page 580

Fr60 32-bit microcontroller
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CHAPTER 18 OSDC
■ Example of Display Signal Output (2)
The examples below show display-disabled periods due to input of horizontal synchronization
(HSYNC) and vertical synchronization (VSYNC) signals.
Figure 18.3-8 and Figure 18.3-9 show examples of display-disabled periods due to input of
synchronization signals.
Figure 18.3-8 Example of Masking Display Signal Output by HSYNC Signal Input
HSYNC input
VOB output timing
Figure 18.3-9 Example of Masking Display Signal Output by VSYNC Signal Input
VSYNC input
HSYNC input
VOB output period
558
VOB output-enabled period
VOB output-disabled period
VOB output-enabled period
VOB output-disabled period
VOB output-enabled period
VOB output-disabled period
VOB output-enabled period
VOB output-disabled period
VOB output-enabled period
VOB output-enabled period

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