Timer Compare Data Register (Txdrr) - Fujitsu MB91319 Series Hardware Manual

7.2.5

Timer Compare Data Register (TxDRR)

The timer compare data register (TxDRR) stores timer compare data.
■ Timer Compare Data Register (TxDRR)
The timer compare data register (TxDRR) compares data in this register and the value of the
timer counter and then indicates whether there is a compare match. To use this register, set the
interval time in the timer mode and the event count in the external event mode. Enter the upper
count limit in capture mode. This register cannot be 8-bit accessed. Setting 0 in this register
results in 216 counts.
Figure 7.2-6 shows the bit configuration of the timer compare data register (TxDRR)
Figure 7.2-6 Bit Configuration of the Timer Compare Data Register (TxDRR)
TxDRR 0000F4
address 0000FC
000104
00010C
15 14 13
H
H
D15 D14 D13
H
H
R/W R/W R/W
7 6 5
D7 D6 D5
R/W R/W R/W
CHAPTER 7 MULTIFUNCTION TIMER
12 11 10 9
D12 D11 D11 D9
R/W R/W R/W R/W
4 3 2 1
D4 D3 D2 D1
R/W R/W R/W R/W
Initial value
8
D8 XXXXXXXX
R/W
Initial value
0
D0 XXXXXXXX
R/W
179