Table of Contents
Advertisement
CHAPTER 3 CPU AND CONTROL UNITS
3.12.2
Low-power Modes
This section describes the low-power modes, some MB91319 states, and how to use the
low-power modes.
■ Low-power Modes
The MB91319 has the following two low-power modes:
•
Sleep mode: The device enters the sleep state due to writing to a register.
•
Stop mode: The device enters the stop state due to writing to a register.
These modes are described below.
❍ Sleep mode
If 1 is set for bit6 (SLEEP bit) of the standby control register (STCR), sleep mode is initiated and
the device enters the sleep state. The sleep state is maintained until a source for return from the
sleep state is generated.
If 1 is set for both bit7 (STOP bit) and bit6 of the standby control register (STCR), bit7 (STOP bit)
has precedence and the device enters the stop state.
For more information about the sleep state, see "■Sleep State" in "3.12.1 Device States and
State Transitions".
[Circus that stop in the sleep state]
•
Program execution on the CPU
•
Data cache
•
Bit search module (enabled if DMA transfer occurs)
•
Various built-in memory (enabled if DMA transfer occurs)
•
Internal types of and external buses (enabled if DMA transfer occurs)
[Circuits that do not stop in the sleep state]
•
Oscillation circuit
•
PLL that has been enabled
•
Clock generation controller
•
Interrupt controller
•
Peripheral circuit
•
DMA controller
•
DSU
110
Advertisement
Table of Contents
