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[bit14] TBIE (TimeBasetimer Interrupt Enable)
This bit is the time base timer interrupt request output enable bit.
It controls output of an interrupt request when the interval time of the time base counter has
elapsed. A time-base timer interrupt request is generated if bit15 (TBIF bit) is set to 1 when
this bit is set to 1.
0
Time base timer interrupt request output disabled (initial value)
1
Time base timer interrupt request output enabled
•
This bit is initialized to 0 by a reset (RST).
•
This bit is readable and writable.
[bit13 to bit11] TBC2, TBC1, TBC0 (TimeBasetimer Counting time select)
These bits set the interval time of the time base counter that is used for the time base timer.
The values written to these bits determine the interval time, which can be selected from the
eight types shown in Table 3.11-1.
Table 3.11-1 Interval Settings
TBC2
TBC1
TBC0
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
φ: Frequency of the system base clock
•
The initial value is undefined. Be sure to set a value before enabling an interrupt.
•
These bits are readable and writable.
[bit10] (reserved bit)
This bit is reserved.
operation.
Timer interval time
11
φ × 2
0
φ × 2
12
1
13
φ × 2
0
φ × 2
22
1
23
φ × 2
0
φ × 2
24
1
25
φ × 2
0
φ × 2
26
1
The read value is undefined.
CHAPTER 3 CPU AND CONTROL UNITS
If the source oscillation is 10 MHz
and PLL is multiplied by 4
51.2 [µs]
102 [µs]
205 [µs]
105 [ms]
210 [ms]
419 [ms]
839 [ms]
1678 [ms]
Writing to this bit has no effect on
89
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