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■ ST3
Figure 17.2-10 shows the ST3 register.
The address of the ST3 register is 0006_006A
Address:0006-006A
Table 17.2-3 lists the bits of the ST3 register and their functions.
Table 17.2-3 Bits of the ST3 Register
Bit name
Polarity
-
SUSP
ActiveHigh
SOF
ActiveHigh
CFEND
ActiveHigh
SETUP
ActiveHigh
CFGVLAL
EPO0NULL
ActiveHigh
STDREQ1
ActiveHigh
STDREQ2
ActiveHigh
Only 0 is valid for writing to bit2, bit4, and bit6.
Figure 17.2-10 ST3 Register
15
14
13
12
11
S
S
H
T
T
D
D
R
R
E
E
Q
Q
2
1
R
R
This bit is reserved. WRITE is allowed, but it does not affect the USB transfer.
-
The bit indicates '1' or '0' at READ.
This bit is reset when the device enters the suspended status and is cleared
when the device is released from the suspended status.
This bit indicates that an SOF packet was received.
After this bit is set, the set status is retained until 0 is written to this bit.
This bit indicates that initialization of the device was completed.
This bit indicates that a SETUP packet was received.
This bit is set when the macro receives command that does not perform
automatic response and it responds using the ACK. This bit is not set for
command that does automatic response.
This bit is reset when tha data of OUT transfer other than SETUP packet is
received by control transfer and responds by the ACK.
This bit indicates current Configuration value.
-
If the macro receives BUS RESET and Set Configuration 0, it transits to the
default state. CFGVAL shows '0' at the default state.
This bit indicates that the data packet of length 0 is received at OUT side in
ENDPOINT0.
Once it is set, 0 is retained until write operation is performed.
This bit indicates that DREQ1 asserts.
This bit indicates that DREQ2 asserts.
.
H
10
9
8
7
6
5
E
C
P
F
O
G
0
N
V
U
A
L
L
L
R/W R
Function
CHAPTER 17 USB FUNCTION
4
3
2
1
0
S
C
S
S
E
F
O
U
T
E
F
S
U
N
P
-
P
D
R/W
R
R/W
R
R/W
Initial value
00-------0000000
B
389
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