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14.2.2
Serial Control Register (SCR)
The serial control register (SCR) controls the transfer protocol that is used for serial
communication.
This section describes the configuration and functions of the serial control register
(SCR)
■ Serial Control Register (SCR)
The SCR controls the transfer protocol that is used for serial communication.
Figure 14.2-3 shows the bit configuration of the serial control register (SCR).
Figure 14.2-3 Bit Configuration of the Serial Control Register (SCR)
SCR
Address: ch0 000062
ch1 00006A
ch2 000072
ch3 00007A
ch4 000082
[bit7] PEN (Parity Enable)
This bit specifies whether to add parity in serial communication when data communication is
performed.
Table 14.2-3 shows the parity.
Table 14.2-3 Parity
PEN
0
1
Note:
Parity can be added only in normal mode (Mode 0) of asynchronous (start-stop synchronization)
communication mode. No parity can be added in multiprocessor mode (Mode 1) or CLK synchronous
communication mode (Mode 2).
7
6
5
PEN
P
SBL
H
H
R/W
R/W R/W R/W R/W
H
H
H
Function
No parity
[initial value]
Parity
4
3
2
1
CL
A/D
REC RXE TXE
W
R/W R/W
CHAPTER 14 UART
0
Initial value
00000100
B
261
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