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CHAPTER 3 CPU AND CONTROL UNITS
3.9
Operating Modes
Two operating modes are provided: bus mode and access mode. This section describes
these modes.
■ Operating Modes
❍ Bus mode
Bus mode refers to a mode in which the operations of internal ROM and the external access
function are controlled. A bus mode is specified using the setting pins (MD2, MD1, and MD0) and
the ROMA bit in the mode data.
❍ Access mode
An access mode is specified using the WTH1 and WTH0 bits in the mode register and the DBW1
and DBW0 bits in ACR0 to ACR7 (Area Configuration Register).
■ Bus Modes
The MB91319 has the following three bus modes.
❍ Bus Mode 0 (single-chip mode)
In this mode, internal I/O, DbusRAM, FbusRAM, and FbusROM are valid. Access to other areas
is invalid.
External pins do not serve as bus pins, but serve as peripheral or general-purpose I/O ports.
❍ Bus Mode 1 (internal-ROM/external-bus mode)
In this mode, internal I/O, DbusRAM, and FbusRAM, as well as FbusROM, are valid. Access to
an area that enables external access is handled as access to an external space. Some external
pins serve as bus pins.
❍ Bus Mode 2 (external-ROM/external-bus mode)
In this mode, internal I/O, DbusRAM, and FbusRAM are valid, but access to FbusROM is invalid.
All accesses are handled as access to an external space. Some external pins serve as bus pins.
64
Bus mode
Single chip
Internal ROM/external bus
External ROM/external bus
Access mode
16-bit bus width
8-bit bus width
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