Fujitsu MB91319 Series Hardware Manual page 396

CHAPTER 16 DMA CONTROLLER (DMAC)
(Continued)
MB91xxx
Read cycle
I-bus
D-bus
MB91xxx
Read cycle
I-bus
D-bus
MB91xxx
Read cycle
I-bus
D-bus
374
Built-in IO area => internal RAM area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM IO
Internal RAM area => external area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM IO
Internal RAM area => built-in IO area transfer
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM IO
MB91xxx
DMAC
Write cycle
I-bus
Bus controller
D-bus
Data buffer
F-bus
RAM
MB91xxx
DMAC
Write cycle
I-bus
Bus controller
D-bus
Data buffer
F-bus
RAM
MB91xxx
DMAC
Write cycle
I-bus
Bus controller
D-bus
Data buffer
F-bus
RAM
X-bus
IO
X-bus
IO
X-bus
IO