Table of Contents
Advertisement
Horizontal Display Position
Command 5-3 (Horizontal Display Position Control)
.................................................. 579, 618
Horizontal Size
Character Horizontal Size Control (Setting for Each
............................................ 481
Character)
Horizontal Synchronous
Example of Horizontal Synchronous Operation
Horizontal Synchronous Operation
HRCL
Hold Request Cancellation Request Level Setting Register
............................................... 210
(HRCL)
HRLC
Hold Request Cancellation Request
(HRLC: Hold Request Cancel Request)
I
I Flag
................................................................. 50
I Flag
I/O Map
........................................................... 670
I/O Map
I/O Pin
Command 13-0 (I/O Pin Control)
Command 13-1 (I/O Pin Control 2)
I/O Port
Basic Block Diagram of the I/O Port
.................................................. 129
I/O Port Modes
............................................................... 5
I/O Ports
2
I
C Interface
2
.......................................................... 4
I
C Interface
2
......................................... 287
I
C Interface Registers
IBCR
Bus Control Register (IBCR)
IBSR
Bus Status Register (IBSR)
ICCR
Clock Control Register (ICCR)
ICR
Bit Configuration of the Interrupt Control Register (ICR)
.......................................................... 208
Configuration of Interrupt Control Register (ICR)
Mapping of Interrupt Control Register (ICR)
IDAR
.......................................... 305
Data Register (IDAR)
IDBL
IDBL (Clock Disable Register)
IFCR
IFCR (FIFO Control Register)
IFDR
IFDR (FIFO Data Register)
IFN
IFN (FIFO Data Count Register)
IFRN
IFRN (FIFO Reception Count Register)
ILM
Interrupt Level Mask (ILM) Register
......... 551
......................... 551
...... 212
........................... 591
......................... 592
....................... 128
................................. 292
................................... 289
.............................. 298
........ 52
............... 52
.............................. 306
............................... 307
................................... 307
............................ 306
................... 309
......................... 51
Immediate Transfer Instructions
Immediate Set/16-bit/32-bit Immediate Transfer
...........................................709
Instructions
INIT
Setting Initialization Reset (INIT) Clear Sequence
Settings Initialization Reset (INIT)
Settings Initialization Reset (INIT) State
INIT
INIT Pin Input (Settings Initialization Reset Pin)
Initial Values
Initial Values and Functions of the Port Function Registers
.................................................133
(PFRs)
Initialization
.......................................................273
Initialization
Operation Initialization Reset (RST)
Operation Initialization Reset (RST) Clear Sequence
Setting Initialization Reset (INIT) Clear Sequence
Settings Initialization Reset (INIT)
Input Dot Clock Selection
Input Dot Clock Selection Control
Input Pin Function
Operation of the Input Pin Function (in Internal Clock
..................................................147
Mode)
Input-Output Circuit
Input-Output Circuit Types
Instruction
20-Bit Delayed Branch Macro Instructions
32-Bit Delayed Branch Macro Instructions
32-Bit Normal Branch Macro Instructions
Add-Subtract Instructions
Bit Manipulation Instructions
Branch Instruction with Delay Slot
Branch Instruction without Delay Slot
...........................................705
Compare Instructions
Coprocessor Control Instructions
Delayed Branch Instructions
Direct Addressing Instructions
FR Family Instruction Lists
How to Read the Instruction Lists
Immediate Set/16-bit/32-bit Immediate Transfer
...........................................709
Instructions
...............................................703
Instruction Format
................................................706
Logic Instructions
Memory Load Instructions
Memory Store Instructions
............................................708
Multiply Instructions
Normal Branch (No Delay) Instructions
Operation of INT Instruction
Operation of INTE Instruction
Operation of RETI Instruction
Operation of Undefined Instruction Exception
................................................714
Other Instructions
.........................................34
Overview of Instructions
Register-to-Register Transfer Instructions
...........................................719
Resource Instructions
.................................................709
Shift Instructions
INT
Operation of INT Instruction
........71
............................68
...................109
..........69
..........................68
.....71
........71
............................68
...........................543
......................................17
................716
................718
.................717
......................................705
.................................707
............................46
........................48
............................720
..................................713
...............................719
...................................704
...........................700
....................................710
....................................711
....................712
....................................61
..................................61
..................................63
.............62
.................711
....................................61
731
Advertisement
Table of Contents
