10-Bit Slave Address Mask Register (Itmk) - Fujitsu MB91319 Series Hardware Manual

15.2.5

10-bit Slave Address Mask Register (ITMK)

This section describes the configuration and functions of the 10-bit slave address mask
register (ITMK).
■ 10-bit Slave Address Mask Register (ITMK)
Figure 15.2-9 shows the bit configuration of the 10-bit slave address mask register (ITMK).
Figure 15.2-9 Bit Configuration of the 10-bit Slave Address Mask Register (ITMK)
Address:
ch0 0000B8
ch1 0000C8
ch2 0000D8
ch3 0000E8
[bit15] ENTB (10-bit slave address enable bit)
This bit is the 10-bit slave address enable bit.
0
1
Write to this bit while the I
[bit14] RAL (Slave address length bit)
This bit indicates the slave address length.
0
1
If the 10-bit and 7-bit slave address enable bits are both enabled (ENTB =1 and ENSB = 1), this
bit can be used to determine whether the transfer length of a 10-bit or 7-bit slave address
becomes valid.
This bit is valid when the AAS bit (IBSR) is set to 1.
This bit is cleared when the interface is disabled (ICCR EN = 0).
This bit is read-only.
[bit13 to bit10] Reserved bits
These bits are reserved. The values read from these bits are always 1s.
15
H
ENTB RAL
H
R/W
H
Initial value 0
H
7
TM7
R/W
Initial value 1
10-bit slave address disabled
10-bit slave address enabled
2
C interface is stopped (ICCR EN = 0).
7-bit slave address
10-bit slave address
14 13 12 11
R R R R
0 1 1 1
6 5 4 3
TM6 TM5 TM4 TM3
R/W R/W R/W R/W
1 1 1 1
2
CHAPTER 15 I C INTERFACE
10 9 8
TM9 TM8
R R/W R/W
1 1 1
2 1 0
TM2 TM1 TM0
R/W R/W R/W
1 1 1
301