Test Mode Register (Tmode) - Fujitsu MB91319 Series Hardware Manual

Fr60 32-bit microcontroller
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7.2.7

Test Mode Register (TMODE)

TMODE is a register to set the HSYNC counter mode.
■ TMODE
Figure 7.2-8 Bit Configuration of the Test Mode Register (TMODE)
TMODE
000110
Address
[bit2] HCNTMD...This bit sets the HSYNC counter mode.
0: Normal mode
1: HSYNC counter mode
The counter ch.0 is used in the HSYNC counter mode. When input HSYNC to TMI0 and
VSYNC to TMI1, the counter is used to set to the capture mode.
Be sure to specify different edge for capture start and end edges.
[bit15 to bit3, bit1 to bit0] (reserved)
This bits are reserved. Write "0" to these bits.
15
14
13
H
7
6
5
TMODE is a register to set the HSYNC counter mode.
This register is allowed an access with 16-bit.
CHAPTER 7 MULTIFUNCTION TIMER
12
11
10
9
4
3
2
1
HCNTMD
R/W
8
Initial value
B
0
Initial value
B
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