18.3.1
Dot Clock Control ...................................................................................................................... 543
18.3.2
Sync Signal Input ....................................................................................................................... 548
18.3.3
Display Signal Output ................................................................................................................ 556
18.3.4
Display Period Control ............................................................................................................... 559
18.3.5
Synchronization Control ............................................................................................................ 561
18.3.6
Interrupt Control ......................................................................................................................... 564
18.3.7
OSDC Operation Control ........................................................................................................... 567
18.4
Display Control Commands ............................................................................................................ 569
18.4.1
18.4.2
18.4.3
18.4.4
18.4.5
18.4.6
18.4.7
18.4.8
18.4.9
18.5
18.5.1
18.5.2
18.5.3
18.5.4
18.5.5
18.5.6
18.5.7
18.5.8
18.5.9
18.6
FONT RAM Interface ...................................................................................................................... 625
19.1
Outline of Flash Memory ................................................................................................................. 630
19.2
Flash Memory Registers ................................................................................................................. 637
xii