Flash Control/Status Register (Flcr) - Fujitsu MB91319 Series Hardware Manual

CHAPTER 19 FLASH MEMORY
19.2.1

Flash Control/Status Register (FLCR)

The flash control/status register (FLCR) indicates the operation status of flash memory.
■ Configuration of Flash Control/Status Register (FLCR) (CPU Mode)
This register controls writing to flash memory.
This register can only be accessed in CPU mode. Do not access this register using the Read
Modify Write instruction.
Figure 19.2-2 shows the bit configuration of FLCR.
00007000
Reserved Reserved Reserved Reserved
H
[bit7] Reserved
This is a reserved bit. Always set this bit to "0."
[bit6, bit5] Reserved
These are reserved bits. Always set these bits to "1."
[bit4] Reserved
This is a reserved bit. It is initialized to "0" during a reset.
[bit3] RDY
This bit indicates the operation status of the automatic algorithm (write/erase).
When this bit is set to "0," writing or erasure is in progress with the automatic algorithm and no
Write and Erase command can be accepted. Moreover, data cannot be read from any address
in flash memory.
The read data indicates the flash memory status as listed in the table below.
0
1
• This bit is not initialized during a reset.
• Only read operation is possible, but write operation does not affect this bit.
638
Figure 19.2-2 Bit Configuration of FLCR
bit7 bit6 bit5
R/W R/W R/W
(0) (1) (1)
Writing or erasing is in process, flash memory is not ready
to accept a new Write/Erase command, and no data can
be read from a flash memory address.
Flash memory is ready to accept a new Write/Erase
command and data can be read from a flash memory
address.
bit4 bit3 bit2
RDY Reserved
R R R/W
(0) (0) (0)
bit1 bit0
WE Reserved
R/W R/W
(0) (0)