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■ Peripheral Clock (CLKP)
This clock is used for peripheral circuits and peripheral buses.
It is used by the following circuits:
•
Peripheral bus
•
Clock controller (only for the bus interface)
•
Interrupt controller
•
Peripheral I/O ports (port*, port*)
•
I/O port bus
•
External interrupt input
•
UART
•
16-bit timer
•
A/D converter
•
ICU
•
Free-run timer
•
Reload timer
•
Up/down counter
•
Input capture
•
Output compare
2
•
I
C interface
•
PPG
Note:
Since 20 MHz is the upper-limit frequency for operation, do not set a combination of multiply-by rate
and divide-by rate that results in a frequency exceeding this limit.
■ External Bus Clock (CLKT)
This clock is used for external extended bus interfaces.
It is used by the following circuits:
•
External extended bus interface
•
External CLK output
Notes:
• Since 20 MHz is the upper-limit frequency for operation, do not set a combination of multiply-by
rate and divide-by rate that results in a frequency exceeding this limit.
• Processing capability of CPU is affected by the setting of wait register (FLWC). Be sure to set the
appropriate value to this register. See Section "19.2.2
CHAPTER 3 CPU AND CONTROL UNITS
Flash Memory Wait Register (FLWC)".
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