Fujitsu MB91319 Series Hardware Manual page 61

[bit1] Overflow flag
Indicate whether an overflow has occurred as a result of the operation when the operand is
regarded as an integer represented by its 2's complement.
Value
0 Indicates that the operation did not cause an overflow.
1 Indicates that the operation caused an overflow.
The initial value after reset is undefined.
[bit0] Carry flag
Indicate whether a carry or a borrow has occurred from the most significant bit in the
operation.
Value
0 Indicates that no carry or borrow has occurred.
1 Indicates that a carry or borrow has occurred.
The initial value after reset is undefined.
❍ System condition code register (SCR)
[bit10, bit9] Step division flag
Hold the intermediate data when step division is executed.
Do not change these bits during step division.
To execute other processing during a step division, save and restore the value of the PS
register to ensure that the step division is restarted.
The initial value after reset is undefined.
When the DIVOS instruction is executed, the multiplicand and divisor are accessed and this
flag is set.
When the DIV0U instruction is executed, this flag is cleared.
[bit8] Step trace trap flag
This bit specifies whether the step trace trap is to be enabled.
Value
0 The step trace trap is disabled.
The step trace trap is enabled.
1
All user NMIs and user interrupts are prohibited.
Reset clears this bit to 0.
The step trace trap function is also used by emulators. When being used by an emulator, this
function cannot be used in a user program.
Description
Description
10 9 8 [Initial value]
D1 D0 T XX0
Description
CHAPTER 3 CPU AND CONTROL UNITS
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