Operation Of The 16-Bit Pulse Width Counter - Fujitsu MB91319 Series Hardware Manual

8.3

Operation of the 16-Bit Pulse Width Counter

The 16-bit pulse width counter consists of a 16-bit up counter, three 8-bit control
registers, a PWC data register, PWC upper data register, and an LPF. This counter
measures the pulse width. One of five count clocks can be selected.
■ Basic Operation of the 16-Bit Width Pulse Counter
❍ Pulse width count operation
The PWC captures the counter value and clears the counter at the rising and falling edge of the
PMI signal.
captured, the PWC generates an interrupt.
When the counter value changes from FFFF
interrupt.
Figure 8.3-1 shows the basic operation of the 16-bit pulse width counter.
Figure 8.3-1 Basic Operation of the 16-bit Pulse Width Counter
ST
(operation enable)
PMI input
Rising edge
Falling edge
FFFF
H
Upper value mmm
Count value
0000
H
PWCD
INT
UPINT
OVFL
LOW
Note:
The first edge (ST=1) is not captured after the operation enables.
The cleared counter continues counting unchanged.
H
xxxx aaaa
H H
CHAPTER 8 16-BIT PULSE WIDTH COUNTER
to 0000
H
cccc dddd
bbbb
H
H
When the count value is
, the PWC generates an overflow
H
The upper value interrupt
is set, but not captured.
eeee
H
H
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