Fujitsu MB91319 Series Hardware Manual page 433

■ Setup Stage of Control Transfer (Class and Vendor Commands and Some Standard Commands
[Get_Descriptor, Set_Descriptor, and Synch_Frame])
The class and vendor commands
Set_Descriptor, and Synch_Frame) received from the host are written to the FIFO buffer for OUT
transfer at end point 0.
Figure 17.3-2 shows the flow of the setup stage of control transfer (to process class and vendor
commands and some standard commands [Get_Descriptor, Set_Descriptor, and Synch_Frame]).
Figure 17.3-2 Flow of the Setup Stage of Control Transfer (to Process Class and Vendor Commands and
Some Standard Commands [Get_Descriptor, Set_Descriptor, and Synch_Frame])
(1)
USB
The flow shown by the figure is explained below.
(1) When the setup stage of control transfer is started by the USB, the protocol engine asserts the
SETUP pin and sets the SETUP bit of the status register.
(2) If a Get_Descriptor, Set_Descriptor, Sync Frame, class, or vendor command is received, the
protocol engine writes the data in the setup stage to the FIFO0o register and increments the
value of the write transfer size register.
(3) If the setup stage ends normally, the protocol engine transmits an ACK handshake signal to
the USB. At this time, the ACK0o bit of the ST1 register (status register) is set and the value
of the write transfer size register is loaded into the RSIZE0 register (status register). The
protocol engine also asserts the IRQ pin to externally report that data in the setup stage was
received.
If the setup stage does not end normally because of an error, the protocol engine does not
return anything to the USB, discards the received data, and sets the NACK0o bit of the status
register.
(4) Valid data is read from the FIFO0o register into the CPU interface.
Note:
A command received as data must be decoded and processed by an application program.
Protocol
engine
CHAPTER 17 USB FUNCTION
and some standard commands (Get_Descriptor,
FIFO buffers
for end points
(2)
Control
and
status
registers
(3)
(4)
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