Table of Contents
Advertisement
9.3
Interrupt Controller Operation
This section describes the following items regarding operation of the interrupt
controller:
• Priority decision
• NMI
• Hold request cancellation request
• Return from standby mode (stop/sleep)
■ Priority Decision
The interrupt controller selects the interrupt source with the highest priority from among those that
exist simultaneously and outputs the interrupt level and the interrupt number of this source to the
CPU.
The following shows the priority decision criteria for interrupt sources:
•
NMI
•
Source that meets the following conditions:
•
Source with a value other than 31 as the interrupt level (31 means interrupts disabled)
•
Source with the smallest value for the interrupt level
•
Source with the smallest interrupt number that satisfies the both conditions above
If no interrupt source is selected according to the above decision criteria, 31 (11111
the interrupt level. The interrupt number at this time is undefined.
■ NMI
An NMI (Non Maskable Interrupt) has the highest priority among the interrupt sources handled by
this module. Thus, an NMI is always selected if it occurs at the same time as other interrupt
sources.
•
If an NMI occurs, the following information is reported to the CPU:
•
Interrupt level: 15 (01111
•
Interrupt number: 15 (0001111
•
Detecting an NMI
The external interrupt and NMI module sets and detects an NMI. This module only generates
an interrupt level, interrupt number, and MHALTI in response to an NMI request.
•
Preventing a DMA transfer occurring due to an NMI
If an NMI request occurs, the MHALTI bit of the HRCL register is set to 1 to prevent DMA
transfer. To clear the state preventing DMA transfer, clear the MHALTI bit to 0 at the end of
the NMI routine.
CHAPTER 9 INTERRUPT CONTROLLER
)
B
)
B
) is output as
B
211
Advertisement
Table of Contents
