Fujitsu MB91319 Series Hardware Manual page 357

Fr60 32-bit microcontroller
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[bit7 to bit0] DASZ (Des Addr count size)*:Transfer destination address count size
These bits specify the increment or decrement width for the transfer destination address
(DMADA) of the corresponding channel for each transfer operation. The value set by these
bits becomes the address increment/decrement width for each transfer unit. The address
increment/decrement width conforms to the instruction in the transfer destination address
count mode (DADM).
Table 16.2-17 shows the specification of the transfer destination address count size.
Table 16.2-17 Specification of the Transfer Destination Address Count Size
DASZ
XXXX
Specify the increment/decrement width of the transfer destination address. 0 to 255
When reset: Not initialized
These bits are readable and writable.
CHAPTER 16 DMA CONTROLLER (DMAC)
specification
Function
335

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